With clocked circuits such as digital signal processing circuits for example, input signals are usually scanned or sampled at discrete points in time. If the clock is, for example, a 1 MHz signal, the clock cycles encompass one microsecond intervals. Input signals are usually also scanned and evaluated at intervals of one microsecond, i.e., in accordance with times determined by the clock. Consequently, the temporal resolution of the input signals cannot be finer than one microsecond. A digital circuit clocked at 1 MHz, for example, cannot determine if a change in an input signal has occurred, for example, 0.1 or 0.5 microseconds prior to a clock cycle. Phase measuring circuits for this purpose are described, for example, in a German patent application P 41 23 388.3. These circuits are capable of determining the phase relation between an input signal, also called a test signal, and a reference signal which may be (or derived from) a system clock. In doing this it may result, for example, in downstream stages being controlled, i.e., clocked, by the input signal rather than by the system clock.
If a significant change, for example a negative-going edge transition, occurs in the input signal, the relative temporal position which this change has in the clock raster is measured, stored and provided at an output. By using such a circuit it is possible to measure the relative temporal position of a significant change of the input signal in the clock raster of the digital circuit.
However, the output signal of this phase measuring circuit is delayed by a certain time in relation to the change in the input signal. Thus, the time at which the output signal of the phase measuring circuit occurs is determined by the time of the input signal change and by further delay times. That is, the output signal may appear unpredictably. This may produce conflicts with following stages, which sample their input signals at times determined by the clock. Thus, the output signal of the phase measuring circuit may appear exactly at the time when it is being sampled. This results in an uncertainty regarding a decision as to whether or not the output signal of the phase measuring circuit appeared before or after the clock. This decision is determined by chance or by noise. If the decision is made incorrectly, a phase measuring error of an entire clock cycle, i.e., for example, of one microsecond at a clock frequency of 1 MHz, is produced.